[Libre-soc-dev] pia as cycle accurate simulator?

Jacob Lifshay programmerjake at gmail.com
Thu Oct 15 18:09:47 BST 2020

On Thu, Oct 15, 2020, 04:32 Luke Kenneth Casson Leighton <lkcl at lkcl.net>

> On Thu, Oct 15, 2020 at 7:45 AM Lauri Kasanen <cand at gmx.com> wrote:
> > I'd like to repeat my request for the simulator to be based on
> > something existing (qemu, pearpc, etc) in C/C++.

if it would help, I could easily add C bindings to pia. Calling between
Rust and C/C++ is just as fast as calling in C or Rust, especially
considering that LLVM can inline between languages using LTO.

Additionally, there are projects designed to automatically produce the
needed declarations in both directions:
generating C headers for a Rust library automatically: cbindgen
generating Rust declarations from C/C++ headers automatically (using Clang
for extra correctness points): bindgen

You can think of Rust as similar to C but with fancy compile-time
correctness checking/proving, a different syntax, lots of powerful
zero-cost abstractions, a much nicer toolchain, and other benefits. So,
assuming you spend a little effort, you can write code that's even faster
than C because Rust's abstractions allows you to use harder-to-implement
algorithms without the fear of running into UB and ending up with a nearly
impossible to debug pile of junk.

> ok, noted.  personally i agree with you: my experience with spike was
> that it was really straightforrward.  here's where things stand:
> * qemu is not cycle-accurate, it's a JIT.  it's flat-out eliminated on
> this basis alone.
> * pearpc is nowhere near complete (64-bit) and is in c
> * IBM's simulator *is* complete, it's in c, it's proprietary, but IBM
> would, if asked, actually consider opening it.
> * gem5 power branch is still experimental, and is... quite hairy to
> work with.  it's in c++.
> * pia is not a simulator (no way to "execute" instructions) and would
> be a big project.

it's not that hard, just tedious. I could have a working simulator for the
instructions currently implemented up in 2-3 days.

* ISAcaller - part of LibreSOC - "does the job", is cycle-accurate, in
> python is relatively slow, however has the advantage of being
> co-developed with the HDL.

iirc it just executes everything in one cycle and doesn't keep track of
cycles, so, if that counts as cycle accurate, it would be trivial to add
that level of cycle accuracy to a pia-based simulator.


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