[Libre-soc-dev] efficient decoding algorithm for variable-length instructions

Luke Kenneth Casson Leighton lkcl at lkcl.net
Thu Nov 26 03:40:44 GMT 2020

On 11/26/20, Cole Poirier <colepoirier at gmail.com> wrote:

> Doesn't this run up against the OPF benefit vs complexity tradeoff
> unfavourably like you were explaining yesterday i.e. remapping all of OPISA
> v3.0B/3.1B?

no as it'd be in its own VLE-like page, and, with the encoding being
specifically designed to embed the length *and* mode within the LSBs,
drastically simplifies the 1st and 2nd phase decoding FSMs.  in fact
1st and 2nd stage FSM would reduce to a stateless one (combinatorial).

however i realised, that, just i put in the intro on the wiki pages,
the C encoding taking 2 bits is a whopping 48 chunk smashed out of the
64 entry (6 bit) space.

only 16 possible Major Opcodes could fit.

RISCV deals with this by having *seven* bits dedicated to 32 bit
instructions.  first 2 bits are always 0b11.  5 bits remain to give 30
major opcodes.  the last 2 0b0111111 and 0b1111111 are used to
indicate "escape to 48 bit and 64 bit encoding".

this leaves *25* bits (32-7) for encoding 32bit instructions.

OpenPOWER requirea *26* (32-6)

conclusion: not viable.


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