[Libre-soc-dev] ecc memory without extra memory chips or extra i/o pins
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Wed Dec 16 09:40:48 GMT 2020
On Wed, Dec 16, 2020 at 6:41 AM Jacob Lifshay <programmerjake at gmail.com> wrote:
> I think it might be a good idea to have a new layer between the soc and the
> ddr memory interface that adds support for ecc by reserving 1/9 of the
> bytes for error correction. This would help give our soc extra reliability
> What do you think?
really interesting idea. put in bugtracker. short reply, meeting soon.
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