Luke Kenneth Casson Leighton
lkcl at lkcl.net
Tue Dec 15 21:16:51 GMT 2020
On 12/15/20, Jacob Lifshay <programmerjake at gmail.com> wrote:
> Also, I responded to some of the things on the svp64 discussion page.
just saw this:
(programmerjake: simple solution -- rename them internally such
that CR6 is the first one)
no. it was hard enough getting the LE/BE numbering right without also
throwing in arbitrary offsets then trying to think with that
it took 2 months to spot a critical bug, where all CR references had
been inverted consistently.
it was four months before i got the CR pipeline right, mfocr had been
wrong all that time.
it was *five* months before i got a handle on a persistent bug in the simulator.
now imagine trying to explain to someone that when they run Vector
Processing, CR0 becones CR6, CR1 becomes CR7 but when you go back to
scalar it's all different numbering? but actually it's all backwards
you have to take 7-CRidx in all those 4 cases because it's BE
and that offset has to be encoded into the SV hardware-loop issuer
*and* the reg renamer.
no, definitely not. we are already at the threshold of "insanely complex" :)
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