[Libre-soc-bugs] [Bug 604] ISACaller simulator needs RADIX MMU support

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Mar 2 18:14:42 GMT 2021


--- Comment #3 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
design discussed here


RADIX Mem class to be added as an option that has a Mem class as a member

and treats that as "Physical" memory.

exact same API.

class RADIXMem:

       self.mem = Mem()

    def ld(.....)

    def st(.....)

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