[Libre-soc-bugs] [Bug 382] nmigen wishbone Memory object needed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=382

--- Comment #4 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #3)
> found another
> https://git.m-labs.hk/M-Labs/HeavyX
> 
> heavycomps/heavycomps/wishbone.py contains an SRAM.

btw watch out for that repository, it now appears to be default language
in russian.

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