[libre-riscv-dev] daily kan-ban update 19jul2020

Yehowshua yimmanuel3 at gatech.edu
Sun Jul 19 23:46:00 BST 2020

> in our case that's 17,000 flattened signals.

Well, oMigen won’t flatten out verilog black boxes, but it
will flatten out the dram controller for example.

Which hopefully you don’t need to debug…

Verilator retains the hierarchy of whatever it consumes.
SO you’ll get a hierarchical CPU and flat peripherals.


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