[libre-riscv-dev] 130nm for the hackers : finally a reality ?

Luke Kenneth Casson Leighton lkcl at lkcl.net
Wed Jul 1 12:02:35 BST 2020

crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68

On Wed, Jul 1, 2020 at 11:16 AM Cesar Strauss <cestrauss at gmail.com> wrote:
> On 06/30/2020 14:18, whygee at f-cpu.org wrote:
> > https://hackaday.com/2020/06/30/your-own-open-source-asic-skywater-pdf-
> > plans-first-130-nm-wafer-in-2020/
> From the article:
> > In November, they plan to order a multiproject wafer with 40 slots. They
> > don’t know yet if they will have to beg and plead to get 40 designs or
> > if they will have to winnow the select down from all possible
> > candidates. If you are one of the 40, you’ll get about 10mm square to
> > play with and wind up with somewhere around 100 to 300 chips in
> > chip-scale packaging (CSP).

ok.  180nm is 70,000 gates per sq.mm, therefore (square law), 130nm is
double that.  (180/130 * 180/130).  so that's 1.4 million gates.

> An opportunity for libre-SOC?


> Are there many existing libre hardware projects, at the ASIC level, to
> compete for these 40 slots?

no idea!  almost certainly, google will take them up with something.

> I wonder how to solder these CSP onto a PCB,


probably BGA.

> > Let us know what IC you want to design — or see someone else design — in
> > the comments.
> Maybe it would be appropriate to leave a comment?

we'd really need to speak with Staf, as it means moving from October
180nm with Eurocircuits, to November 130nm.

> Besides libre-SOC, I myself would be very interested as well in a libre
> FPGA design, with an open bitstream format and libre toolchain.

there's one written in chisel3.


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