[libre-riscv-dev] pinmux in nmigen
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Mon Mar 25 17:31:31 GMT 2019
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Mon, Mar 25, 2019 at 4:13 PM Rishabh Jain <rishucoding at gmail.com> wrote:
> Yes, i remember the first phase. We used to specify the specification, the
> pinout in a file in a tabular format.
> Then, using python templates, we generated the bsv code. Then using
> bluespec compiler, it automatically generated the
> verilog code.
yes. this time, with nmigen, i'd like to not have to actually
auto-generate python code, rather, to write code that *is* python,
> For this verilog RTL, we used to model the same design in python cocotb and
> test the functional correctness.
yes. it was quite a lot of fun, i remember.
> To begin, I shall experiment with some of the files to get my hands back on
> Can you give more insights on where nmigen will be useful?
nmigen is libre, bluespec is not.
> Earlier, bluespec used to generate verilog. But, nmigen can also generate
> verilog (as we are doing in CAM).
yes it can.
> So, are you thinking to switch to nmigen and replace bsv?
not replace, just leave it as-is. if the shakti group want to use it, great.
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