[libre-riscv-dev] buffered pipeline
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Tue Mar 19 05:56:26 GMT 2019
On Tue, Mar 19, 2019 at 5:47 AM Jacob Lifshay <programmerjake at gmail.com> wrote:
> > (jacob please do trim replies, like i've done below
> > On Tue, Mar 19, 2019 at 5:32 AM Jacob Lifshay <programmerjake at gmail.com>
> > wrote:
> > can i ask you a favour, could you raise a bugreport on m-labs
> > tracker, that Record.eq doesn't work in the simulation?
> already exists:
> > https://github.com/m-labs/nmigen/issues/31
> I don't think .eq was ever supposed to work as it doesn't account for Direction.
hmmm, that reminds me of the hell that we had to go through in
connecting up Bluespec modules (interfaces aka signals) to where they
the pinmux is extremely unusual in that it needs pin directions to be
i'll see what happens.
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