[libre-riscv-dev] Wish to work on

Luke Kenneth Casson Leighton lkcl at lkcl.net
Sat Mar 9 22:17:56 GMT 2019

On Sat, Mar 9, 2019 at 9:21 PM Daniel Benusovich
<flyingmonkeys1996 at gmail.com> wrote:
> >  I see, new modules: AddressEncoder, Decoder, VectorAssembler, etc have been added when i run read_verilog Cam.v
> I added those yesterday to clean up the mess of lines that come after
> the "anonymous" blocks that serve as CamEntry modules. If you ever add
> a new sub module to a design you will see it populate that field.
> Note that the some are anonymous and some are named.

 i think it might be possible to give the Array-anonymous thingies
names by assigning a variable "name" to them.  obj.name = "camentry%d"
% idx


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