[libre-riscv-dev] 1R1W regfiles

Luke Kenneth Casson Leighton lkcl at lkcl.net
Thu Dec 20 06:58:44 GMT 2018

so there's 2 levels of crossbars/multiplexers:

* 4-in 4-out 32-bit from the Hi-odd / Lo-odd / Hi-even / Lo-even banks
* 4-in 4-out *8*-bit wide for elwidths down to 8 bit

and the idea is:

* pairs of 32-bit Function Units are required to process (store)
src1/src2 64-bit operands
* pairs of 8-bit Function Units are also required to process 16-bit operands

however... the routing required for *both* 4-in 4-out 32-bit *and* 4-4
8-bit is completely insane.

so i had (another) idea: we're going to deploy xBitManip anyway...
so.. um... why not have the xBitManip ALUs do the actual crossbar
pre-processing at the 8-bit level?

the only thing is: we will absolutely need operand forwarding, for
that to work.  the reason: the src1/src2 32-bit-wide data that comes
out of the regfile banks will be supposed to come in to the *EIGHT
BIT* Function Unit area, *NOT* the 32-bit Function Unit area, but the
xBitManip ALUs will be in the *32-bit* FU area.

in some ways it may be easier to have a micro-code operation here, but
it is absolutely absolutely essential that, unlike "standard"
processing which normally goes into the register file, the output
*must* not do so.

or.... perhaps.... hmmmm.... we make the xBitManip ALU actually part
of the 8-bit Function Units, not the 32-bit ones!

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