[Libre-soc-isa] [Bug 1242] SV REMAP: store REMAP indices in 4 groups of 16 64-bit SPRs (or registers)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1242

--- Comment #8 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #6)

> that's a good idea, except that it needs to *not* be the 128th register,
> since we need to plan ahead for when we'll have more than 127 as the max
> length.

the extra bits on 128th can expand the length in its MSB just like
the additional bank expands the indices to 16-bit.

> also, my idea for when we have to support indexes >=256 is we just add
> another bank of registers called idxhi or something that stores the msb 8
> bits for every element and the old idx registers store the lsb 8 bits.

yes. awkward but doable, like the ZX Spectrum screen which did 1st row
of 1st 8 rows then 2nd row of 1st 8 rows - really odd but hardware does
not care.

(In reply to Jacob Lifshay from comment #7)

> ok, created bug #1243

i've closed it as invalid, if you are not familiar with why please
ask on that invalid bugreport (only), do not re-open it or spend
significant time on it, we have too much to do and very little time.

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