[Libre-soc-isa] [Bug 1087] change pseudocode to prevent output register write only when causing a fp trap and output is in same regfile as input

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1087

--- Comment #30 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
just leave it as this:

   v = fptoint(FRB)
   if overflow and enabled:
       trap()
   else:
       RT = v

* overflow will be written into CR0 by ISACaller (post-pseudocode-execution)
* CR0's remaining bits are undefined (to be mentioned in the english language
  spec section)
* even if RT is analysed by ISACaller (post-pseudocode-execution) it is
  "Not Your Problem(tm)" - because RT is undefined.
* software will need to be told "on exception the only CR0 bit you can
  trust is CR0.SO".

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