[Libre-soc-isa] [Bug 1087] change ISACaller and correct bug introduced in parser.py where it bypasses FPSCR as a local parameter and a return result

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1087

--- Comment #10 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #2)
> (In reply to Jacob Lifshay from comment #0)
> > https://libre-soc.org/irclog/%23libre-soc.2023-05-21.log.html#t2023-05-21T10:
> > 29:37
> > 
> > things like fcvtfg don't need to prevent writing the output since the output
> > is in a different regfile and thus can't possibly overlap with the input reg.
> 
> this is a misunderstanding of how the simulator works.

this bug is not motivated by how the simulator works, but by how the PowerISA
spec has decided to setup state in preparation for fp traps. we need to match
the PowerISA spec. the simulator must be adjusted to match pre-existing
convention, not convention adjusted to match our arbitrary simulator internals.

(In reply to Luke Kenneth Casson Leighton from comment #3)
> (In reply to Jacob Lifshay from comment #1)
> > see xscvdpsxds for an example -- we need to add/remove the `if vex_flag`
> 
> i have absolutely no idea why on earth that would be necessary.

because that's the convention PowerISA decided on and, unless you want to
propose to the ISA WG that they rewrite the pseudocode for all their existing
fp ops (both Appendix A (see SNaN Operand for examples) and all fp vmx/vsx ops
and probably decimal fp too), we need to match their existing convention.

please confirm you understand that we need to solve the issue of getting the
right pseudocode for the spec to match existing conventions, *because those
conventions will 99.9% likely not change to suit our existing simulator because
of how massive the change would be*.

(In reply to Luke Kenneth Casson Leighton from comment #4)
> > change pseudocode to prevent output register write only when 
> > causing a fp trap and output is in same regfile as input
> 
> whatever you do, do *not* do this.  i will change the bugreport
> to the correct (required) action.

please *don't repurpose bugs* like this, open a new bug and close the old one
instead. it is especially problematic when the original bug is still a bug that
needs fixing (like in this case), but also just confusing for people who see an
email for a new bug and click on the link but are lead to a completely
different bug because the entry was usurped.

please open a new bug for "change ISACaller and correct bug introduced in
parser.py where it bypasses FPSCR as a local parameter and a return result" and 
change this bug's title back to "change pseudocode to prevent output register
write only when causing a fp trap and output is in same regfile as input" or at
least "add pseudocode to properly setup for fp traps according to PowerISA spec
convention"

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