[Libre-soc-isa] [Bug 1087] change pseudocode to prevent output register write only when causing a fp trap and output is in same regfile as input

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun May 21 11:16:57 BST 2023


--- Comment #1 from Jacob Lifshay <programmerjake at gmail.com> ---
basically we need to add/remove the pseudocode that explicitly sets up register
state (FRT/RT and FPSCR, not SRR0 or other trap machinery) for taking a fp
see xscvdpsxds for an example -- we need to add/remove the `if vex_flag`

You are receiving this mail because:
You are on the CC list for the bug.

More information about the Libre-SOC-ISA mailing list