[Libre-soc-isa] [Bug 1087] change pseudocode to prevent output register write only when causing a fp trap and output is in same regfile as input

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1087

--- Comment #1 from Jacob Lifshay <programmerjake at gmail.com> ---
basically we need to add/remove the pseudocode that explicitly sets up register
state (FRT/RT and FPSCR, not SRR0 or other trap machinery) for taking a fp
trap.
see xscvdpsxds for an example -- we need to add/remove the `if vex_flag`

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