[Libre-soc-isa] [Bug 1056] questions and feedback (v2) on OPF RFC ls010

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1056

--- Comment #73 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #72)

> > (luke, have we defined how SVP64 instructions interact with performance
> > counters around what counts as an instruction? e.g. when VL=5, does
> > sv.add *r3, *r30, r0
> > count as 1 instruction, 5 instructions, 6 instructions,
> > implementation-specific number of instructions, or something else?)
> 
> sigh no, yet another thing on the todo list. good catch

thoughts: very simple.  instructions == looped therefore they are instructions.
just like MOV SS and REP.  there technically *are* no Vector operations at all.
therefore count suffix only.  bit weird, but consistent.

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