[Libre-soc-isa] [Bug 1056] questions and feedback (v2) on OPF RFC ls010

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Thu Jun 8 05:35:00 BST 2023


--- Comment #70 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Paul Mackerras from comment #58)

> * If you started to execute the function identified by the two words
> together and then wanted to take an interrupt before you were finished, you
> would need to set SRR0 to point to the first word, not the second. But if
> you think of the two words as two separate instructions, you would naturally
> set SRR0 to point to the second word, which would be wrong.

remember i was previously expecting SVSTATE to be a peer of MSR
and PC, and that SVSTATE would be saved in SVSRR1 exactly like
SRR0 and SRR1. if joined by SVSRR2 and by a save-sv-rm-24-bits
SPR then this issue is solved.  but it is costly.

when we last discussed this (eek a year ago?) and you persuaded me
that SVSRR1 was not needed (just avoid using SVP64 instructions
in context-switches), i did not anticipate the issue you raise above.

which eliminates simple implementations (treating the two as separate
instructions), they *have* to prohibit interrupts if reading only
one 32-bit word per clock cycle. slightly annoying but not the end of
the world.

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