[Libre-soc-isa] [Bug 1056] questions and feedback (v2) on OPF RFC ls010

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Fri Jun 2 17:40:44 BST 2023


--- Comment #54 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Paul Mackerras from comment #26)
> (In reply to Luke Kenneth Casson Leighton from comment #14)

> >  https://libre-soc.org/openpower/sv/ls010/hypothetical_addi/ )
> ah, is that where the split fields thing came from...

yes, from PO1-Prefixing, consider the {24-bit}{32-bit} in the same
way.  i consider such an approach to be a mistake for SV.

jacob and i went to a LOT of trouble to ensure that SV is an
orthogonal consistent RISC paradigm.

therefore just saying RT moves to "a Vector Context" uniformly
across the *ENTIRE* spec is both possible and reasonable.

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