[Libre-soc-isa] [Bug 1071] maybe add parallel prefix sum remap mode

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1071

--- Comment #2 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
how is it different from parallel prefix reduction bug #864?

https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/isa/remap_preduce_yield.py;hb=HEAD

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