[Libre-soc-isa] [Bug 937] instructions for bigint shift and prefix-code encode

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=937

Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
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             Status|CONFIRMED                   |IN_PROGRESS

--- Comment #7 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Jacob Lifshay from comment #6)
> one benefit of the modulo-64 idea is we don't need a 128-bit rotator, 64-bit
> will do afaict -- testing needed:
> 
> for the RT <- ((RA || RB) << ((RT) % 64)) >> 64 variant:

tested python version:
def rotl64(a, b):
    a %= 2 ** 64
    return ((a << b % 64) | (a >> -b % 64)) % 2 ** 64

def dshl(a, b, n):
    mask = (1 << (64 - n % 64)) - 1
    v = (a & mask) | (b & ~mask)
    return rotl64(v, n)

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