[Libre-soc-isa] [Bug 924] potential major opcode allocation for SVP64

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=924

--- Comment #12 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #11)

> should still be able to do the bit 32:33 part afaict...

yes that's new.

basically to 24-bit-prefix EXT000-063 and also include
SVP64Single and identify it that's:

* 24-bit prefix
* 1-bit vector/scalar
* 1-bit saying "old" encoding
* 6-bit PO EXT009

grand total 32-bits

thus in effect we are asking for a whopping 50% of EXT009-64bit

the next one - "new" - we can say "we don't want all of it"

* 24-bit prefix
* 1-bit vector/scalar
* 1-bit saying "new" encoding
* 6-bit PO EXT009
then
* 2-bit in 32-34 to say "we want 25% of this"

as that as in the same "PO" position (call it PO2) that corresponds to
EXT248-EXT263

which then leaves 75% of 50% left for future ISA WG needs, a grand
total of:

* 64 minus (
  * 6-bit PO EXT009 (taken up)
  * 1-bit "new" encoding (bit6)
  * 2-bit "not SVP64-Reserved" (bits 32-34)
 )

=

a massive 55 bits available for future encoding space of non-SVP64
instructions.
it's actually slightly more than the allocated space of EXT001 (ok so they
have 6-bits taken up with a "specifier")

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