[Libre-soc-isa] [Bug 924] potential major opcode allocation for SVP64
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Thu Sep 15 14:01:03 BST 2022
https://bugs.libre-soc.org/show_bug.cgi?id=924
--- Comment #7 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
| width | assembler | prefix? | suffix | description |
|-------|-----------|--------------|-----------|---------------|
| 64bit | fishmv | 0x24000000 | 0x12345678| scalar EXT2nn |
| 64bit | ss.fishmv | 0x24!zero | 0x12345678| scalar SVP64Single:EXT2nn |
| 64bit | sv.fishmv | 0x26nnnnnn | 0x12345678| vector SVP64:EXT2nn |
second round of ideas needed, above shows how fishmv would be
allocated as scalar, svp64single and svp64vector, in the newly
proposed EXT2nn area
| width | assembler | prefix? | suffix | description |
|-------|-----------|--------------|-----------|---------------|
| 32bit | fishmv | none | 0x12345678| scalar EXT0nn |
| 64bit | ss.fishmv | 0x26!zero | 0x12345678| scalar SVP64Single:EXT0nn |
| 64bit | sv.fishmv | 0x27nnnnnn | 0x12345678| vector SVP64:EXT0nn |
this one shows how it would be done if fishmv was in EXT063.
any of the 64bit areas if allocated to anything else it's Game Over
at the Decode Phase.
UNLESS..... this:
| width | assembler | prefix? | suffix | description |
|-------|-----------|--------------|-----------|---------------|
| 64bit | fishmv | 0x24000000 | PO2 345678| scalar EXT2nn |
| 64bit | ss.fishmv | 0x24!zero | PO2 345678| scalar SVP64Single:EXT2nn |
| 64bit | sv.fishmv | 0x26nnnnnn | PO2 345678| vector SVP64:EXT2nn |
where PO2 is:
| PO2 | Usage |
|----------|--------|
| 0b11nnnn | SVP64 |
| 0b00nnnnn| other |
| 0b10nnnnn| other |
| 0b01nnnnn| other |
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