[Libre-soc-isa] [Bug 905] create Scalar reg access encoding (SVP64-Single)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=905

--- Comment #8 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #5)
> (In reply to Jacob Lifshay from comment #2)
> > (In reply to Luke Kenneth Casson Leighton from comment #1)
> > > thinking out loud for bitallocations
> > > 
> > > * 12 EXTRA4x3
> > 
> > alternately 12 EXTRA3 x4
> 
> if you meant "3 extra scalar bits", yes.
> 
> [SVP64.EXTRA3 contains scalar/vector - vector is redundant for SVP64Single].

ah, yeah, i forgot that...i had meant SVP64's EXTRA3, but i guess we'd only
need 2 bits for augmenting 5-bit register fields.

> 
> to get up to 2^7 there are 4 extra bits required
> because all CR fields are only 3 bit.
yes

> > 2 saturate -- unsigned/signed saturate differently, we'll want both -- this
> > should be encoded as a signed/unsigned bit and a saturate bit, since the
> > signed/unsigned bit is also useful for deciding to sign/zero extend
> > inputs/outputs when src/destelwid differ.
> 
> ahh ok
> 
> > also fp ops have different values worth saturating to:
> > * standard 0.0 to 1.0
> > * standard -1.0 to 1.0
> > * i32? u32? i8? u8? i16? u16?
> 
> change of meaning of the operation must not occur.  saturate to
> those values *and still be a float* (i.e. convert to int, saturate,
> then convert back to float), not a problem.

i meant to saturate float to the range of those int types, not to convert to an
int and back. e.g. 23.5 saturating to u8's range is 23.5, but 300.25 goes to
255.0.

>  change the meaning
> of the operation to store in an *int*, we can't do that.

yup, not my intention.
> 
> but... hmmm... saturating on some of the fp-to-int operations,
> yes not a problem there.

fp-to-int operations would use standard int saturation modes, not fp saturation
modes -- the destination isn't a float after all.

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