[Libre-soc-isa] [Bug 960] OPF ISA External RFC ls003 - maddedu and divmod2du

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=960

--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://libre-soc.org/irclog/%23libre-soc.2022-10-20.log.html#t2022-10-20T20:12:02

lkcl    octavius, the language of the RFC needs to be more "x is added to y and
placed into z"  20:12
lkcl    the wording of maddld (etc) can be used as a template   20:12
lkcl    btw we need a bugreport for it  20:13
lkcl    https://bugs.libre-soc.org/show_bug.cgi?id=944 is for ls002     20:13
lkcl    so, maddhd says:        20:14
lkcl    "The 64-bit operands are (RA), (RB), and (RC). The      20:14
lkcl    128-bit product of the operands (RA) and (RB) is        20:14
lkcl    added to (RC). The high-order 64 bits of the 128-bit    20:14
lkcl    sum are placed into register RT.        20:14
lkcl    "       20:14
lkcl    therefore, we literally cut-and-paste that text 20:14
lkcl    and     20:14
lkcl    add     20:14
lkcl    "The low-order 64-bits of the 128-bit sum are placed into register RC" 
20:15
lkcl    also, you removed the tag       20:17
lkcl    which ensures that ls003 is missing from this auto-generated page:
https://libre-soc.org/openpower/sv/rfc/      20:17

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