[Libre-soc-isa] [Bug 960] OPF ISA External RFC ls003 - maddedu and divmod2du

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=960

--- Comment #12 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #11)
> and i just realised, for parallel mode (RS=RT+MAXVL)
> a whopping 127 SPRs are needed. drat.

imho that isn't a problem...the instructions just won't support RS=RT+MAXVL
mode as it isn't very useful for those specific instructions, hence why I
limited it to just those instructions that aren't useful except for bigint
stuff, where you always want RS=RC.

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