[Libre-soc-isa] [Bug 960] OPF ISA External RFC ls003 - maddedu and divmod2du

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=960

--- Comment #11 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #10)

> one other option is using a spr

nice idea. greatly reduces opcode pressure but throws RS=R5+MAXVL
under a bus

> ctr?

no.

> maybe a new 64-bit spr named carry?)

it becomes part of mandatory context-switch state.
cannot have too many.  share with GF polynomial?

and i just realised, for parallel mode (RS=RT+MAXVL)
a whopping 127 SPRs are needed. drat.

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