[Libre-soc-isa] [Bug 553] svp64 register mapping to accomidate AltiVec vectors expanding fp registers

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=553

--- Comment #13 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Jacob Lifshay from comment #12)
> well, vsx registers are used for 128-bit scalar operations (f128, i128), so,
> unless you want to propose a completely separate set of 128-bit arithmetic
> operations (which imho will never fly with the openpower foundation because
> *they already have them*), by your deciding to not make any attempt to
> interoperate with vsx registers, we are effectively permanently locked out
> of 128-bit arithmetic instructions, which imho is foolish.

this means just vsx registers, not the whole of vsx/vmx.

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