[Libre-soc-isa] [Bug 794] SVP64 REMAP for utf8
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Mon Aug 29 08:48:27 BST 2022
https://bugs.libre-soc.org/show_bug.cgi?id=794
Jacob Lifshay <programmerjake at gmail.com> changed:
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--- Comment #36 from Jacob Lifshay <programmerjake at gmail.com> ---
I got UTF-8 validation to work!
I had to do a bunch of instruction substitution to work around limitations/bugs
in the instruction simulator, most of the limitations/bugs are documented in
the comments on the function that generates the assembly:
https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/test/algorithms/svp64_utf_8_validation.py;h=f040f1e6f114927bfcae0714d9d76bb737e0c42c;hb=918f3eadf7118a6ecd0e2eb6caaaed9da6936299#l135
I also implemented a better memory dump for logging, like hexdump -C:
https://git.libre-soc.org/?p=openpower-isa.git;a=commit;h=661ae80360644dfe3a9e7f3610d534cc3a7e545f
I also implemented support for svp64 prefixed instructions that have a
libre-soc-custom suffix, e.g. sv.maxu:
https://git.libre-soc.org/?p=openpower-isa.git;a=commit;h=0e80cab3b809d432354ca05464e95dc53db11b64
I also added support to Expected for when tests don't care what so, ov, and ca
get set to, those can just be set to None:
https://git.libre-soc.org/?p=openpower-isa.git;a=commit;h=07f5f22461d5eda844141b2ffd33e021d2b43ffb
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