[Libre-soc-isa] [Bug 817] Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=817

--- Comment #34 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff;h=b6044fdb84bea61887999ffa5e17543fa91b8f89

good, whew.  i have to explain all this :)

caveat here: divmid2du communicating "overflow", that's... expensive.
CR0 and/or OE=1.  OE=1 is not going to fit into VA-Form EXT04.
each is an extra register.

making the operation always "divmid2du." would do the job, but, dang,
that's 3-in, 3-out.

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