[Libre-soc-isa] [Bug 686] create Power ISA test API

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=686

--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
the basic idea here is to abstract out state testing of any simulator or
executor of Power ISA instructions, to be able to make an exact comparison of
ANY two such simulators/executers.

the things to test (extract from two sim/exers and compare):

1) ALL registers. GPR, FPR, SPR, MSR, PC, CR
2) ALL memory locations (with the option to specify some)

on the list of things that provide state needing test/compare:

1) qemu via pygdbmi
2) power-gem5 via same
3) cavatools-power (when it is ready) via same
4) **DIRECT** gdb native execution (also via pygdbmi)
5) ISACaller simulator (from openpower-isa)
6) LibreSOC HDL (via nmigen simulation)
7) microwatt HDL (most likely via cocotb using GHDL)

all of these therefore need a CONSISTENT defined way to "extract":

1) all registers
2) memory at specific address locations

this is NOT about creating *ONE* API in *ONE* class. it is about
creating *TWO* APIs that are directly and inextricably linked.
the tester API *USES* the testee (state) API to obtain the
full list of registers (and memory values) from *two* testees
and once obtained then and only then can the tester actually make
the comparison.

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