[Libre-soc-isa] [Bug 615] talk to binutils and gcc developers about acceptable sv assembly format

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=615

--- Comment #3 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
the "fallback position": ".long xxxxx; op N,N,N" where .long contains a v3.1
EXT01 major opcode

clearly, having gcc output such is not exactly desirable.

an alternative is the addition of an svp64 32 bit instruction:

     svp64 fields,qualifying,next,op

this would become very confusing due to the fact that the qualified v3.0 32 bit
instruction following it will have non-obvious register numbers

(SVP64 augments 5-bit register numbers RA etc, FRA etc and BA etc, and also
3-bit CR fields BFA etc)

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