[Libre-soc-isa] [Bug 615] talk to binutils and gcc developers about acceptable sv assembly format

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=615

--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
clarifying the characteristics and requirements here (edit as required)

1 SVP64 embeds v3.0B scalar instructions
  as a hardware-level for-loop
2 implications: the scalar instruction
  needs to be "preserved" i.e. obvious
  from the SV-augmentation
3 the SV-augmentation must pass through
  gcc macro parsing without interference
  in that parsing
4 the SV-augmentation must meet binutils
  parsing requirements or at least not
  need significant changes to binutils
5 numerical-only register numbering should
  be possible

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