[Libre-soc-isa] [Bug 650] write rfc for OpenPower fpr <-> gpr moves/conversions
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Thu Jun 3 12:26:58 BST 2021
https://bugs.libre-soc.org/show_bug.cgi?id=650
--- Comment #7 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #6)
> 0-5 | 6-10 | 11-24 | 25-30 | 31
> Major | FRT | UI | XO | UI0
>
> if two columns of Minor 19 are used it becomes possible
> to fit the entire BF16
nope. wrong.
0-5 | 6-10 | 11-25 | 26-30 | 31
Major | FRT | UI | XO | UI0
* 26-30 is five. top half of XO like in addpcis
* 11-25 is fifteen
* plus bit 31 is sixteen bits.
no need for 2 columns, just one will do
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