[Libre-soc-isa] [Bug 553] svp64 register mapping to accomidate AltiVec vectors expanding fp registers

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=553

Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|INVALID                     |WONTFIX

--- Comment #3 from Jacob Lifshay <programmerjake at gmail.com> ---
Ahh, so gcc already supporting contiguous register ranges in the register
allocator combined with avoiding reworking existing instructions/ABIs in gcc
that use register pairs finally sounds like a good enough reason to me to not
implement #553. Lets just hope it can efficiently allocate large ranges without
n^2 or n^3 runtime :)

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