[Libre-soc-isa] [Bug 572] elwidth and indirection: two vectors, one width

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=572

--- Comment #1 from Alexandre Oliva <oliva at libre-soc.org> ---
I've just realized that the phrase "two vectors" in the subject may be both
inaccurate and misleading.

so, to try to be abundantly clear, I'm mainly talking about the (potential)
vector of addresses, and the (potential) vector of objects it/they refer to,
NOT about the vector register that will hold the loaded values.

also, I am mostly sure that in the end only one of the (potential) vectors ends
up being an actual vector, though subvl>1 might actually turn out to make both
of them actual vectors.

it also occurs to me now to wonder now whether there is a any case (or way to
express) that both are scalars, as in, load this single value from memory, and
then place it in all elements of the destination vector.

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