[Libre-soc-isa] [Bug 571] svp64 vector loads: sub-dword selection before or after byte-reversal

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=571

--- Comment #3 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
did a readthrough: the one that was relevant is, where does the src width come
from vs what is the unit stride?

and in the *older* spec which did not have dusl elwidth overrides, the src
elwidth *was* the stride width *was* the LD operation width (lb, lh, lw, ld).

however since we introduced twin elwidths (for saturation) we have three
widths, and therefore it makes sense that:

* the unit stride multiplier comes from the operation (lb, lh, lw, ld)
* the post-load truncation/extension comes from the src elwidth override

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