[Libre-soc-isa] [Bug 560] big-endian little-endian SV regfile layout idea

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Jan 5 05:10:45 GMT 2021


https://bugs.libre-soc.org/show_bug.cgi?id=560

--- Comment #69 from Alexandre Oliva <oliva at libre-soc.org> ---
there's only one bit pattern that represents that number in binary, and that's:

0 * 2^{0} + 0 * 2^{1} + 0 * 2^{2} + 1 * 2^{3} + 0 * 2^{4} + 1 * 2^{5} + 0 *
2^{6} + 0 * 2^{7} + 1 * 2^{8} + 1 * 2^{9} + 1 * 2^{10} + 0 * 2^{11} + 0 *
2^{12} + 1 * 2^{13} + 0 * 2^{14} + 0 * 2^{15} + 0 * 2^{16} + 1 * 2^{17} + 1 *
2^{18} + 0 * 2^{19} + 0 * 2^{20} + 1 * 2^{21} + 0 * 2^{22} + 0 * 2^{23} + 1 *
2^{24} + 0 * 2^{25} + 1 * 2^{26} + 0 * 2^{27} + 0 * 2^{28} + 1 * 2^{29} + 0 *
2^{30} + 0 * 2^{31} + 0 * 2^{32} + 0 * 2^{33} + 1 * 2^{34} + 0 * 2^{35} + 0 *
2^{36} + 1 * 2^{37} + 0 * 2^{38} + 0 * 2^{39} + 1 * 2^{40} + 1 * 2^{41} + 0 *
2^{42} + 0 * 2^{43} + 0 * 2^{44} + 1 * 2^{45} + 0 * 2^{46} + 0 * 2^{47} + 0 *
2^{48} + 1 * 2^{49} + 0 * 2^{50} + 0 * 2^{51} + 0 * 2^{52} + 1 * 2^{53} + 0 *
2^{54} + 0 * 2^{55} + 1 * 2^{56} + 0 * 2^{57} + 0 * 2^{58} + 0 * 2^{59} + 0 *
2^{60} + 1 * 2^{61} + 0 * 2^{62} + 0 * 2^{63}

I can imagine that, by confusing presentation order with significance, you may
come to a notion that the in-register representation of a number could vary
depending on endianness.  it doesn't, because endianness is thrown out the
window in a register.  the wires and flip-flops holding the bits may be
shuffled along with their significances however you like, and the represented
number won't change, any more than it would if you held a soroban in front of a
mirror, or wrote a date as MM/DD or DD/MM.

now, you say there are 4 cases, but even in memory there are only two
endiannesses; what other binary choice you're adding to the in-memory
array/vector representations to make it 4 cases rather than two?

even with byte-reversing loads, for which you enumerated 4 cases, it's reduced
to two cases, because two reversals cancel out; and if you came up with a
notion of endianness that made sense for a register, rather than memory, that
would make for 8 cases, not 4; so would you please spell out the 4 cases you
had in mind in your question?

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