[Libre-soc-isa] [Bug 560] big-endian little-endian SV regfile layout idea

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=560

--- Comment #42 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Alexandre Oliva from comment #40)

> without an explicit request for byte-reversal, the ld instruction will keep
> the MSByte in the MSByte, and the LSByte in the LSByte, 

remember that it took me 5 months to get the code passing the unit tests due to
a form of dyslexia.

even so i believe that what you say is incorrect.

my understanding is - and bear in mind that the code passes unit tests, for all
permutations of XER.LE/BE, for all permutations of whether bytereverse ldst or
straight ldst is used, is that the MSByte does NOT go into the MSByte but into
the LSByte under the circumstances that you describe.

this for both microwatt and libresoc.

this because it is a chosen convention.

that convention being: ALU and regfile are LE.

therefore it us required - *required* - that BE data be bytereversed when
loaded from memory.

this misunderstanding may be the source of confusion.

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