[Libre-soc-isa] [Bug 560] big-endian little-endian SV regfile layout idea

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Mon Aug 16 19:02:11 BST 2021


--- Comment #103 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #102)
> (In reply to Jacob Lifshay from comment #101)
> > lkcl says he's fine with it as long as he doesn't have to do the work:
> > https://libre-soc.org/irclog/%23libre-soc.2021-08-16.log.html#t2021-08-16T17:
> > 45:38
> no, i did not explicitly say that.  i have a very good idea of exactly how
> much
> work is involved and i am not happy about it. i still have to be the one that
> assesses its impact, and makes sure that the person doing the work
> actually does a full, thorough and complete job.

it's worth pointing out that you are not the only one on this project, others
can/will assess impact too (whoever is implementing this -- probably me, as
well as probably lxo, considering how much he was pushing for this)

> that still leaves me with a burden of responsibility for something that
> i know will take a hell of a lot of work, and risks damaging SVP64 by making
> it virtually impossible to understand.

it changes how sub-registers are addressed, everything else remains unchanged.
Imho this is far from the most confusing part of SV (the most confusing part
for me is probably vertical-first mode, or maybe the other FFT stuff).

> also i said that the task has to include a full and complete comparative
> analysis against using the existing solution (LDST-bytereverse (ldbrx)
> when Vectorised, plus the Bytereverse mode of REMAP).
> in addition to that we cannot keep on adding features (especially high
> impact fundamental low-level ones like this which take up huge amounts
> of time even just to assess).

Well, I do think we will want this feature in the end (the ISA WG may also
demand it for consistency with the rest of the ISA), and the longer we put this
off, the harder it is to implement and the more work will be wasted trying to
work around the lack of this feature.

Therefore, I think it's worth me spending a few weeks trying to implement in
the simulator and testing it out, etc.

You are receiving this mail because:
You are on the CC list for the bug.

More information about the Libre-SOC-ISA mailing list