[Libre-soc-isa] [Bug 213] SimpleV Standard writeup needed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=213

--- Comment #10 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Cole Poirier from comment #9)
> (In reply to Luke Kenneth Casson Leighton from comment #8)
> > i therefore asked cole to collate the CSV files, strip the opcode function
> > unit comment and sgl fields and to sort and uniquify the results, then
> > cross-reference those against the original CSV files to identify the "types"
> > of instructions.
> 
> Got to the point of a 'table' with all of the insns (excluding sprs becuase
> they dont have common column names with all the other opcodes), 

they have a selection method based on the column name (see PowerDecoder2
or more specifically DecodeInA spr_out field) however we are not
going to do parallel/vector SPR read/writes/operations.

> but it seems that all rows are 'unique',

that's why i said strip the opcode, strip the comment column, strip the
function unit column (and the sgl column).  as in: destroy / remove entirely.

oh, and now that i look at it: strip (destroy, remove) the opcode column as
well

opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry
out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe,comment,form

-->

in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn
ext,upd,rsrv,32b,sgn,rc,lk,form

we probably also don't want the "form" field, or the "inv A" or "inv out"
or "rsrv" because those are cache-related not register-related.

-->

in1,in2,in3,out,CR in,CR out,cry in,cry out,ldst len,BR,sgn
ext,upd,32b,sgn,rc,lk

there's just no way that after stripping all those columns there are no
duplicates.

can you drop the results into the wiki, so we can take a look.

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