[Libre-soc-isa] [Bug 529] scheme for supporting 16/48-bit instructions on PowerPC LE with full backward compatibility

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=529

--- Comment #3 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://libre-soc.org/openpower/sv/major_opcode_allocation/

it's complicated but quite elegant, i like it.  i am trying to think through
how mixed 16/32/48 would actually work.  it woukd be necessary i think to pop
16 bit instructions out of bytes 2+3 and leave 0+1 still at the front of the
queue.

-- 
You are receiving this mail because:
You are on the CC list for the bug.