[Libre-soc-dev] Visual legacy

Luke Kenneth Casson Leighton lkcl at lkcl.net
Tue Jul 16 23:57:03 BST 2024


On Tuesday, July 16, 2024, Yann via Libre-soc-dev <
libre-soc-dev at lists.libre-soc.org> wrote:

> I have absolutely no idea about the pinout, the signal functions
> and protocols. From what I gathered, there are JTAG TAP pins.

SDRAM UART I2C SPI GPIO PWM. all on the pinmap.

> That's all.
>
> You're the one who knows the design's architecture,
> I guess you did all the simulations to test the validity
> of the logic design but I'm sad of the lack of a physical
> post-fab test plan.

time. money.

> What is the strategic importance of these proto/samples ?

very first large FOSS ASIC funded entirely by EU Grants.

l.



-- 
---
geometry: without it life is pointless
the fibonacci series: easy as 1 1 2 3


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