[Libre-soc-dev] Introducing, me

Andrey Miroshnikov andrey at technepisteme.xyz
Sat Nov 5 12:22:07 GMT 2022


On 05/11/2022 11:56, Rasmus Frederiksen via Libre-soc-dev wrote:
> Hello,

Hello, nice to meet you!

> 
> Hardware design is hard, and I have no experience in it whatsoever.
> So it looks like there's a lot to learn before I'm going to be doing 
> anything useful.

This project takes a little while to get used to. I started Sep 2021, 
and took 3-4 months before I started any design. My electronics 
background was not as useful given this project is very much laid out by 
software engineers (which is a **good** thing).

Have a look at this tutorial page for nMigen (the python library 
"compiler" we use to create easily configurable HDL describing the soc). 
Take your time, try to get the sanity check example I included on that 
page, and compare the python code with the Yosys generated diagram. 
That's what Luke drilled into me, really helps debugging code.
https://libre-soc.org/docs/learning_nmigen/

Have a look at some of the nmigen code I wrote in the pinmux repo. Can't 
say it's efficient (or pretty), but it will show you the learning 
process for a newbie such as myself.
https://git.libre-soc.org/?p=pinmux.git;a=summary

Also, make sure to use the devscripts to set up environments (study 
these shell scripts, but don't waste your time trying to everything 
manually):
https://libre-soc.org/HDL_workflow/devscripts/
https://git.libre-soc.org/?p=dev-env-setup.git;a=summary

> 
> Still, thought I'd say hi, and I do agree to the charter, it's nice.

The sooner you reach out, even if just to say hello, the better :)




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