[Libre-soc-dev] daily kan-ban update 12may2022

[Tobias Platen]

Today: Fixed the first mismatch in nmigen boards, now unsure about DQS
signals

I compared that to schematics of orangecrab v0.2 and microwatt, it
seemed to be correct
DiffPairs("G18 H17", "B15 A16", dir="io"),
LOCATE COMP "ddram_dqs_n[0]" SITE "A16";
LOCATE COMP "ddram_dqs_n[1]" SITE "H17";
LOCATE COMP "ddram_dqs_p[0]" SITE "B15";
LOCATE COMP "ddram_dqs_p[1]" SITE "G18";

But yesterday I was thinking there is a mismatch in DQS too, not only
RAM_BA0 to RAM_BA2. Maybe n and p are swapped here, as I still get:

ERROR: PIO 'X0/Y53/PIOB' does not appear to be a DQS site (expecting an
'A' pin).
ERROR: Packing design failed.

I also created an account on gitlab