[Libre-soc-dev] 128-core cpu with x86/arm/risc-v binary translation and vector/matrix units

[lkcl]

oo that's a good one, i wonder if the wording by the article writer is garbled and forgot to include "binary translation software" or if they are genuinely doing hardware-level ISA compatibility.  if the latter they're gonna get not one but two sets of lawyers jumping on them. if the former they're probably ok.

On May 12, 2022 5:36:54 AM GMT+01:00, Jacob Lifshay via Libre-soc-dev <libre-soc-dev at lists.libre-soc.org> wrote:
> saw this, seems kinda similar to what we want to do later:
https://www.tomshardware.com/news/tachyum-128-core-all-purpose-cpu