[Libre-soc-dev] CLEAR, Open Source FPGA

[Andrey Miroshnikov]

On 25/03/2022 20:32, Jacob Lifshay wrote:
> On Fri, Mar 25, 2022, 13:07 Andrey Miroshnikov <andrey at technepisteme.xyz>
> wrote:
> I agree, except that there's no way libre-soc or even most tiny risc-v
> cores will fit -- afaict the fpga has only 64 luts. you might be able to
> cram a bit-serial rv32e core in there if your lucky and you use external
> ram or something for the cpu registers.

True. Even basic peripherals will be a stretch.

Still, I'm sure something useful can be done with it. Needs some 
pondering...


On 25/03/2022 20:41, thierry.deval+libresoc at boyudev.be wrote:
 > Hi, Thierry Deval here,
 >
 > No expert in any domain, consider myself as an inquisitive power user.
 >
 > I've been following you for a while. Super exciting !

Nice to meet you Thierry.

 > Am actually trying to follow the dev-env-setup scripts procedure in 
my sparse time.

The main scripts should be functional (I think), good idea to have a 
chroot environment for it. "Automated Installation" section on this page 
shows which scripts setup the chroot:
https://libre-soc.org/HDL_workflow/coriolis2/

 > I have several FPGA boards I could try to build it for.; no 
OrangeCrab yet though.

Good luck! If it's an ECP5 or Xilinx 7-Series FPGA you'll probably be 
fine...might need to play with the build scripts though.


Andrey