[Libre-soc-dev] daily kan-ban update 07mar22

Luke Kenneth Casson Leighton lkcl at lkcl.net
Mon Mar 7 22:29:09 GMT 2022


---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68

On Mon, Mar 7, 2022 at 9:32 PM Andrey Miroshnikov
<andrey at technepisteme.xyz> wrote:
>
> On 07/03/2022 20:12, Luke Kenneth Casson Leighton wrote:
> > niice. got yourself a shed-load of pharmaceutical-grade vitamin D?
> > (you also need magnesium: vit D doesn't "work" unless it's got
> > magnesium to hang on to)
>
> Ah, I didn't realise the magnesium was so necessary. Don't have any in
> the cupboard so will buy some. I've been taking vit D and separate Zinc.

https://www.livescience.com/61866-magnesium-vitamin-d.html
https://www.tesco.com/groceries/en-GB/products/284459086

if you can get food high in "stuff" it's far better than "things inna bottle"
because it usually comes in metaboliseable-form and has the co-whatever
in it already.  for example oranges have both vitamin C and zinc (i think)

> At the moment I have a cough remaining (annoying but bearable). Also
> flow test is positive, so I'll probably keep generating the little
> buggers for a while...

joy! doing your bit for herd immunity, baaa :)

> I'm not sure why there are two classes.

up to you, but bear in mind if you create one class, it has to cope
with both inputs and outputs... will those go to the same pins? yes
i guess they will, esp. for GPIO which is bi-directional and needs
the EN to also be routed...

yep, no good point, one class it is :)

>  The diagram I linked shows a
> single block, so I've probably forgotten something here.
> Do you mean a class for the out/oe direction and a class for the i
> direction? So that the ports could have prefix names of the attached
> peripherals and chip pad pin?

no, you're right, i'd simply forgotten about OE :)

> Yes...with the sheer number of signals we will have anything else is
> madness XD

thank god i did the PHP-style version first, otherwise i'd be going
"oh yeees, you should totally use templates, it'll be easy to read,
 no really"

> Ok, I'll make sure the method will  be able to cope with that (hardwire
> unconnected to zero). Or would it be useful to give the designer a
> choice of hardwire-1 as well?

naah, just let the VLSI tools sort it out.  yosys will reduce the pmux
that gets created for a nmigen Array() down to the bare minumum
muxes already.

l.



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