[Libre-soc-dev] proposal of change of register name convention in SVP64

[Luke Kenneth Casson Leighton]

context: https://libre-soc.org/irclog/%23libre-soc.2022-06-27.log.html#t2022-06-27T19:09:52

there's an issue with identifying operands, particularly when macros and
expressions are involved, in sv-prefixed instructions:

    .set macro, 32
    sv.addi macro.v, macro.v

this is very hard to process, as is:

    sv.addi 0.v, 1.v

due to the expression-parsing function in binutils taking the "0" as a
number.

if however the qualifier is in *front* of the register number then things
get a lot easier.  ideas include:

    sv.addi v.0,    # unfortunately this is already taken with VSX registers
    sv.addi v:0,    # this is ok
    sv.addi v!0,    # meh
    sv.addi v at 0,  # also meh
    sv.add V0, Vr1, Sr2      # uppercase is ok

one important thing, is that the change should not be too radical so as to
invalidate 2 years worth of videos.

thoughts appreciated.

l.