[Libre-soc-dev] microwatt-libre-soc interoperable verilator snapshots / debugging

[Jacob Lifshay]

On Sun, Jan 9, 2022, 04:09 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:

> questions:
>
> 1) does this sound at all reasonable and generally useful for research
>     purposes?
>

yes...to the extent that I thought I had suggested this first (i had just
suggested full simulator state save/load).

>
> 2) is there any other way to achieve this?  kgdb remote? other?
>

maybe VM save/restore? though that would miss TLB activity. if you can get
an instruction trace from qemu or similar, you could then postprocess it
(e.g. with a relatively simple python script) to add the TLB info, allowing
generating the state you want to load. alternatively you could just clear
the TLB on state load, as long as our TLB automatically does page table
walking, and then just ignore TLB state when comparing to microwatt or qemu.

Jacob